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Server : Apache/2.4.18 (Ubuntu) System : Linux canvaswebdesign 3.13.0-71-generic #114-Ubuntu SMP Tue Dec 1 02:34:22 UTC 2015 x86_64 User : oppastar ( 1041) PHP Version : 7.0.33-0ubuntu0.16.04.15 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority, Directory : /usr/src/linux-headers-4.4.0-143-generic/arch/blackfin/include/asm/ |
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/* * asm-blackfin/time.h: * * Copyright 2004-2008 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ #ifndef _ASM_BLACKFIN_TIME_H #define _ASM_BLACKFIN_TIME_H /* * The way that the Blackfin core timer works is: * - CCLK is divided by a programmable 8-bit pre-scaler (TSCALE) * - Every time TSCALE ticks, a 32bit is counted down (TCOUNT) * * If you take the fastest clock (1ns, or 1GHz to make the math work easier) * 10ms is 10,000,000 clock ticks, which fits easy into a 32-bit counter * (32 bit counter is 4,294,967,296ns or 4.2 seconds) so, we don't need * to use TSCALE, and program it to zero (which is pass CCLK through). * If you feel like using it, try to keep HZ * TIMESCALE to some * value that divides easy (like power of 2). */ #ifndef CONFIG_CPU_FREQ # define TIME_SCALE 1 #else /* * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 . * Whenever we change the Core Clock frequency changes we immediately * adjust the Core Timer Presale Register. This way we don't lose time. */ #define TIME_SCALE 4 # ifdef CONFIG_CYCLES_CLOCKSOURCE extern unsigned long long __bfin_cycles_off; extern unsigned int __bfin_cycles_mod; # endif #endif #if defined(CONFIG_TICKSOURCE_CORETMR) extern void bfin_coretmr_init(void); extern void bfin_coretmr_clockevent_init(void); #endif #endif