|
Server : Apache/2.4.18 (Ubuntu) System : Linux canvaswebdesign 3.13.0-71-generic #114-Ubuntu SMP Tue Dec 1 02:34:22 UTC 2015 x86_64 User : oppastar ( 1041) PHP Version : 7.0.33-0ubuntu0.16.04.15 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority, Directory : /usr/src/linux-headers-4.4.0-59/arch/tile/include/asm/ |
Upload File : |
/* * Copyright 2014 Tilera Corporation. All Rights Reserved. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation, version 2. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * NON INFRINGEMENT. See the GNU General Public License for * more details. */ #ifndef _ASM_TILE_PMC_H #define _ASM_TILE_PMC_H #include <linux/ptrace.h> #define TILE_BASE_COUNTERS 2 /* Bitfields below are derived from SPR PERF_COUNT_CTL*/ #ifndef __tilegx__ /* PERF_COUNT_CTL on TILEPro */ #define TILE_CTL_EXCL_USER (1 << 7) /* exclude user level */ #define TILE_CTL_EXCL_KERNEL (1 << 8) /* exclude kernel level */ #define TILE_CTL_EXCL_HV (1 << 9) /* exclude hypervisor level */ #define TILE_SEL_MASK 0x7f /* 7 bits for event SEL, COUNT_0_SEL */ #define TILE_PLM_MASK 0x780 /* 4 bits priv level msks, COUNT_0_MASK*/ #define TILE_EVENT_MASK (TILE_SEL_MASK | TILE_PLM_MASK) #else /* __tilegx__*/ /* PERF_COUNT_CTL on TILEGx*/ #define TILE_CTL_EXCL_USER (1 << 10) /* exclude user level */ #define TILE_CTL_EXCL_KERNEL (1 << 11) /* exclude kernel level */ #define TILE_CTL_EXCL_HV (1 << 12) /* exclude hypervisor level */ #define TILE_SEL_MASK 0x3f /* 6 bits for event SEL, COUNT_0_SEL*/ #define TILE_BOX_MASK 0x1c0 /* 3 bits box msks, COUNT_0_BOX */ #define TILE_PLM_MASK 0x3c00 /* 4 bits priv level msks, COUNT_0_MASK */ #define TILE_EVENT_MASK (TILE_SEL_MASK | TILE_BOX_MASK | TILE_PLM_MASK) #endif /* __tilegx__*/ /* Takes register and fault number. Returns error to disable the interrupt. */ typedef int (*perf_irq_t)(struct pt_regs *, int); int userspace_perf_handler(struct pt_regs *regs, int fault); perf_irq_t reserve_pmc_hardware(perf_irq_t new_perf_irq); void release_pmc_hardware(void); unsigned long pmc_get_overflow(void); void pmc_ack_overflow(unsigned long status); void unmask_pmc_interrupts(void); void mask_pmc_interrupts(void); #endif /* _ASM_TILE_PMC_H */