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Server : Apache/2.4.18 (Ubuntu) System : Linux canvaswebdesign 3.13.0-71-generic #114-Ubuntu SMP Tue Dec 1 02:34:22 UTC 2015 x86_64 User : oppastar ( 1041) PHP Version : 7.0.33-0ubuntu0.16.04.15 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority, Directory : /usr/src/linux-headers-4.4.0-71/arch/m32r/include/asm/m32700ut/ |
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#ifndef _M32700UT_M32700UT_LCD_H #define _M32700UT_M32700UT_LCD_H /* * include/asm-m32r/m32700ut/m32700ut_lcd.h * * M32700UT-LCD board * * Copyright (c) 2002 Takeo Takahashi * * This file is subject to the terms and conditions of the GNU General * Public License. See the file "COPYING" in the main directory of * this archive for more details. */ #ifndef __ASSEMBLY__ /* * C functions use non-cache address. */ #define M32700UT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */) #else #define M32700UT_LCD_BASE (0x10000000 + NONCACHE_OFFSET) #endif /* __ASSEMBLY__ */ /* * ICU */ #define M32700UT_LCD_IRQ_BAT_INT (M32700UT_LCD_PLD_IRQ_BASE + 1) #define M32700UT_LCD_IRQ_USB_INT1 (M32700UT_LCD_PLD_IRQ_BASE + 2) #define M32700UT_LCD_IRQ_AUDT0 (M32700UT_LCD_PLD_IRQ_BASE + 3) #define M32700UT_LCD_IRQ_AUDT2 (M32700UT_LCD_PLD_IRQ_BASE + 4) #define M32700UT_LCD_IRQ_BATSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 16) #define M32700UT_LCD_IRQ_BATSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 17) #define M32700UT_LCD_IRQ_ASNDSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 18) #define M32700UT_LCD_IRQ_ASNDSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 19) #define M32700UT_LCD_IRQ_ACNLSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 21) #define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002) #define M32700UT_LCD_ICUISTS_VECB_MASK (0xf000) #define M32700UT_LCD_VECB(x) ((x) & M32700UT_LCD_ICUISTS_VECB_MASK) #define M32700UT_LCD_ICUISTS_ISN_MASK (0x07c0) #define M32700UT_LCD_ICUISTS_ISN(x) ((x) & M32700UT_LCD_ICUISTS_ISN_MASK) #define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004) #define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006) #define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020) #define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022) #define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024) #define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026) #define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE + 0x300030) #define M32700UT_LCD_ICUCR17 __reg16(M32700UT_LCD_BASE + 0x300032) #define M32700UT_LCD_ICUCR18 __reg16(M32700UT_LCD_BASE + 0x300034) #define M32700UT_LCD_ICUCR19 __reg16(M32700UT_LCD_BASE + 0x300036) #define M32700UT_LCD_ICUCR21 __reg16(M32700UT_LCD_BASE + 0x30003a) #endif /* _M32700UT_M32700UT_LCD_H */